CPU/GPU design
Contents1. Cover Page2. Title Page3. Copyright Page4. Dedication Page5. Contents6. Preface7. CHAPTER 1 Introduction1. 1.1 Overview2. 1.2 Computer Systems1. 1.2.1 The Main Components of a Computer2. 1.2.2 System Components3. 1.2.3 Classification of Computing Devices3. 1.3 An Example System: Wading Through the Jargon4. 1.4 Standards Organizations5. 1.5 Historical Development1. 1.5.1 Generation Zero: Mechanical Calculating Machines(1642–1945)2. 1.5.2 The First Generation: Vacuum Tube Computers (1945–1953)3. 1.5.3 The Second Generation: Transistorized Computers (1954–1965)4. 1.5.4 The Third Generation: Integrated Circuit Computers(1965–1980)5. 1.5.5 The Fourth Generation: VLSI Computers (1980–????)6. 1.5.6 Moore’s Law6. 1.6 The Computer Level Hierarchy7. 1.7 Cloud Computing: Computing as a Service8. 1.8 The Fragility of the Internet9. 1.9 The Von Neumann Model10. 1.10 Non-Von Neumann Models11. 1.11 Parallel Processors and Parallel Computing12. Chapter Summary13. Further Reading14. References15. Review of Essential Terms and Concepts16. Exercises8. CHAPTER 2 Data Representation in Computer Systems1. 2.1 Introduction2. 2.2 Positional Numbering Systems3. 2.3 Converting Between Bases1. 2.3.1 Converting Unsigned Whole Numbers2. 2.3.2 Converting Fractions3. 2.3.3 Converting Between Power-of-Two Radices4. 2.4 Signed Integer Representation1. 2.4.1 Signed Magnitude2. 2.4.2 Complement Systems3. 2.4.3 Excess-M Representation for Signed Numbers4. 2.4.4 Unsigned Versus Signed Numbers5. 2.4.5 Computers, Arithmetic, and Booth’s Algorithm6. 2.4.6 Carry Versus Overflow7. 2.4.7 Binary Multiplication and Division Using Shifting5. 2.5 Floating-Point Representation1. 2.5.1 A Simple Model2. 2.5.2 Floating-Point Arithmetic3. 2.5.3 Floating-Point Errors4. 2.5.4 The IEEE-754 Floating-Point Standard5. 2.5.5 Range, Precision, and Accuracy6. 2.5.6 Additional Problems with Floating-Point Numbers6. 2.6 Character Codes1. 2.6.1 Binary-Coded Decimal2. 2.6.2 EBCDIC3. 2.6.3 ASCII4. 2.6.4 Unicode7. 2.7 Error Detection and Correction1. 2.7.1 Cyclic Redundancy Check2. 2.7.2 Hamming Codes3. 2.7.3 Reed-Solomon8. Chapter Summary9. Further Reading10. References11. Review of Essential Terms and Concepts12. Exercises9. CHAPTER 3 Boolean Algebra and Digital Logic1. 3.1 Introduction2. 3.2 Boolean Algebra1. 3.2.1 Boolean Expressions2. 3.2.2 Boolean Identities3. 3.2.3 Simplification of Boolean Expressions4. 3.2.4 Complements5. 3.2.5 Representing Boolean Functions3. 3.3 Logic Gates1. 3.3.1 Symbols for Logic Gates2. 3.3.2 Universal Gates3. 3.3.3 Multiple Input Gates4. 3.4 Karnaugh Maps1. 3.4.1 Introduction2. 3.4.2 Description of Kmaps and Terminology3. 3.4.3 Kmap Simplification for Two Variables4. 3.4.4 Kmap Simplification for Three Variables5. 3.4.5 Kmap Simplification for Four Variables6. 3.4.6 Don’t Care Conditions7. 3.4.7 Summary5. 3.5 Digital Components1. 3.5.1 Digital Circuits and Their Relationship to BooleanAlgebra2. 3.5.2 Integrated Circuits3. 3.5.3 Putting It All Together: From Problem Description toCircuit6. 3.6 Combinational Circuits1. 3.6.1 Basic Concepts2. 3.6.2 Examples of Typical Combinational Circuits7. 3.7 Sequential Circuits1. 3.7.1 Basic Concepts2. 3.7.2 Clocks3. 3.7.3 Flip-Flops4. 3.7.4 Finite-State Machines5. 3.7.5 Examples of Sequential Circuits6. 3.7.6 An Application of Sequential Logic: ConvolutionalCoding and Viterbi Detection8. 3.8 Designing Circuits9. Chapter Summary10. Further Reading11. References12. Review of Essential Terms and Concepts13. Exercises10. CHAPTER 4 MARIE: An Introduction to a Simple Computer1. 4.1 Introduction2. 4.2 CPU Basics and Organization1. 4.2.1 The Registers2. 4.2.2 The ALU3. 4.2.3 The Control Unit3. 4.3 The Bus4. 4.4 Clocks5. 4.5 The Input/Output Subsystem6. 4.6 Memory Organization and Addressing7. 4.7 Interrupts8. 4.8 MARIE1. 4.8.1 The Architecture2. 4.8.2 Registers and Buses3. 4.8.3 Instruction Set Architecture4. 4.8.4 Register Transfer Notation9. 4.9 Instruction Processing1. 4.9.1 The Fetch–Decode–Execute Cycle2. 4.9.2 Interrupts and the Instruction Cycle3. 4.9.3 MARIE’s I/O10. 4.10 A Simple Program11. 4.11 A Discussion on Assemblers1. 4.11.1 What Do Assemblers Do?2. 4.11.2 Why Use Assembly Language?12. 4.12 Extending Our Instruction Set13. 4.13 A Discussion on Decoding: Hardwired Versus MicroprogrammedControl1. 4.13.1 Machine Control2. 4.13.2 Hardwired Control3. 4.13.3 Microprogrammed Control14. 4.14 Real-World Examples of Computer Architectures1. 4.14.1 Intel Architectures2. 4.14.2 MIPS Architectures15. Chapter Summary16. Further Reading17. References18. Review of Essential Terms and Concepts19. Exercises20. True or False11. CHAPTER 5 A Closer Look at Instruction Set Architectures1. 5.1 Introduction2. 5.2 Instruction Formats1. 5.2.1 Design Decisions for Instruction Sets2. 5.2.2 Little Versus Big Endian3. 5.2.3 Internal Storage in the CPU: Stacks Versus Registers4. 5.2.4 Number of Operands and Instruction Length5. 5.2.5 Expanding Opcodes3. 5.3 Instruction Types1. 5.3.1 Data Movement2. 5.3.2 Arithmetic Operations3. 5.3.3 Boolean Logic Instructions4. 5.3.4 Bit Manipulation Instructions5. 5.3.5 Input/Output Instructions6. 5.3.6 Instructions for Transfer of Control7. 5.3.7 Special-Purpose Instructions8. 5.3.8 Instruction Set Orthogonality4. 5.4 Addressing1. 5.4.1 Data Types2. 5.4.2 Address Modes5. 5.5 Instruction Pipelining6. 5.6 Real-World Examples of ISAs1. 5.6.1 Intel2. 5.6.2 MIPS3. 5.6.3 Java Virtual Machine4. 5.6.4 ARM7. Chapter Summary8. Further Reading9. References10. Review of Essential Terms and Concepts11. Exercises12. True or False12. CHAPTER 6 Memory1. 6.1 Introduction2. 6.2 Types of Memory3. 6.3 The Memory Hierarchy1. 6.3.1 Locality of Reference4. 6.4 Cache Memory1. 6.4.1 Cache Mapping Schemes2. 6.4.2 Replacement Policies3. 6.4.3 Effective Access Time and Hit Ratio4. 6.4.4 When Does Caching Break Down?5. 6.4.5 Cache Write Policies6. 6.4.6 Instruction and Data Caches7. 6.4.7 Levels of Cache5. 6.5 Virtual Memory1. 6.5.1 Paging2. 6.5.2 Effective Access Time Using Paging3. 6.5.3 Putting It All Together: Using Cache, TLBs, and Paging4. 6.5.4 Advantages and Disadvantages of Paging and VirtualMemory5. 6.5.5 Segmentation6. 6.5.6 Paging Combined with Segmentation6. 6.6 Real -World Examples of Memory Management7. Chapter Summary8. Further Reading9. References10. Review of Essential Terms and Concepts11. Exercises13. CHAPTER 7 Input/Output Systems1. 7.1 Introduction2. 7.2 I/O and Performance3. 7.3 Amdahl’s Law4. 7.4 I/O Architectures1. 7.4.1 I/O Control Methods2. 7.4.2 Character I/O Versus Block I/O3. 7.4.3 I/O Bus Operation4. 7.4.4 I/O Buses and Interfaces5. 7.5 Data Transmission Modes1. 7.5.1 Parallel Data Transmission2. 7.5.2 Serial Data Transmission6. 7.6 Disk Technology1. 7.6.1 Rigid Disk Drives2. 7.6.2 Solid State Drives7. 7.7 Optical Disks1. 7.7.1 CD-ROM2. 7.7.2 DVD3. 7.7.3 Blue-Violet Laser Discs4. 7.7.4 Optical Disk Recording Methods8. 7.8 Magnetic Tape1. 7.8.1 LTO: Linear Tape Open9. 7.9 RAID1. 7.9.1 RAID Level 02. 7.9.2 RAID Level 13. 7.9.3 RAID Level 24. 7.9.4 RAID Level 35. 7.9.5 RAID Level 46. 7.9.6 RAID Level 57. 7.9.7 RAID Level 68. 7.9.8 RAID DP9. 7.9.9 Hybrid RAID Systems10. 7.10 The Future of Data Storage11. Chapter Summary12. Further Reading13. References14. Review of Essential Terms and Concepts15. Exercises14. CHAPTER 8 System Software1. 8.1 Introduction2. 8.2 Operating Systems1. 8.2.1 Operating Systems History2. 8.2.2 Operating System Design3. 8.2.3 Operating System Services3. 8.3 Protected Environments1. 8.3.1 Virtual Machines2. 8.3.2 Subsystems and Partitions3. 8.3.3 Protected Environments and the Evolution of SystemsArchitectures4. 8.4 Programming Tools1. 8.4.1 Assemblers and Assembly2. 8.4.2 Link Editors3. 8.4.3 Dynamic Link Libraries4. 8.4.4 Compilers5. 8.4.5 Interpreters5. 8.5 Java: All of the Above6. Chapter Summary7. Further Reading8. References9. Review of Essential Terms and Concepts10. Exercises15. CHAPTER 9 Alternative Architectures1. 9.1 Introduction2. 9.2 RISC Machines3. 9.3 Flynn’s Taxonomy4. 9.4 Parallel and Multiprocessor Architectures1. 9.4.1 Superscalar and VLIW2. 9.4.2 Vector Processors3. 9.4.3 Interconnection Networks4. 9.4.4 Shared Memory Multiprocessors5. 9.4.5 Distributed Computing5. 9.5 Alternative Parallel Processing Approaches1. 9.5.1 Dataflow Computing2. 9.5.2 Neural Networks3. 9.5.3 Systolic Arrays6. 9.6 Quantum Computing7. Chapter Summary8. Further Reading9. References10. Review of Essential Terms and Concepts11. Exercises16. CHAPTER 10 Topics in Embedded Systems1. 10.1 Introduction2. 10.2 An Overview of Embedded Hardware1. 10.2.1 Off-the-Shelf Embedded System Hardware2. 10.2.2 Configurable Hardware3. 10.2.3 Custom-Designed Embedded Hardware3. 10.3 An Overview of Embedded Software1. 10.3.1 Embedded Systems Memory Organization2. 10.3.2 Embedded Operating Systems3. 10.3.3 Embedded Systems Software Development4. Chapter Summary5. Further Reading6. References7. Review of Essential Terms and Concepts8. Exercises17. CHAPTER 11 Performance Measurement and Analysis1. 11.1 Introduction2. 11.2 Computer Performance Equations3. 11.3 Mathematical Preliminaries1. 11.3.1 What the Means Mean2. 11.3.2 The Statistics and Semantics4. 11.4 Benchmarking1. 11.4.1 Clock Rate, MIPS, and FLOPS2. 11.4.2 Synthetic Benchmarks: Whetstone, Linpack, andDhrystone3. 11.4.3 Standard Performance Evaluation CorporationBenchmarks4. 11.4.4 Transaction Processing Performance CouncilBenchmarks5. 11.4.5 System Simulation5. 11.5 CPU Performance Optimization1. 11.5.1 Branch Optimization2. 11.5.2 Use of Good Algorithms and Simple Code6. 11.6 Disk Performance1. 11.6.1 Understanding the Problem2. 11.6.2 Physical Considerations3. 11.6.3 Logical Considerations7. Chapter Summary8. Further Reading9. References10. Review of Essential Terms and Concepts11. Exercises18. Glossary19. Answers and Hints for Selected Exercises20. IndexLandmarks
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